ÐÂÏã¸ÛÁùºÏ²Ê¿ª½±½á¹û

XClose

ÐÂÏã¸ÛÁùºÏ²Ê¿ª½±½á¹ûModule Catalogue

Home
Menu

Analogue CMOS Integrated Circuit Design and Applications (Masters Level) (ELEC0131)

Key information

Faculty
Faculty of Engineering Sciences
Teaching department
Electronic and Electrical Engineering
Credit value
15
Restrictions
Ideally students should have taken Electronic Circuits III (ELEC0026) module, and these students will be given priority in the case of oversubscription.
Timetable

Alternative credit options

There are no alternative credit options available for this module.

Description

Building on what students already know in analogue electronics, this course provides the basis for those interested in following a career in analogue integrated circuit design. Key concepts in CMOS integrated electronics such as device models, current mirrors, amplifiers and opamps, biasing, voltage references and regulators, comparators and noise analysis are covered. Also, aiming to give students a hands-on experience, they are introduced to CMOS layout and actual design processes using an industry standard design suite (CADENCE) in the associated lab sessions.

This module aims to:

  • Provide a current, comprehensive and in-depth treatment of the principles, concepts and techniques required to design analogue integrated circuits (ICs) using CMOS technology.
  • Expose students to the different methodologies used to develop such circuits, including fabrication, electrical modelling and transistor- level circuit design, advanced design and analysis tools.
  • Present examples of analogue ICs for biomedical, sensor and signal conditioning systems.

After following this module students will be able to:

  • Have a good understanding of the design of analogue CMOS ICs.
  • Understand the different issues related to the development of analogue CMOS IC including design, fabrication and implementation.
  • Use tools covering the full custom design of analogue CMOS ICs.
  • At the end of the course, the student should be able to successfully perform the electrical and physical design (layout) of an op-amp or circuit of similar complexity, in an industrial environment (i.e., using CADENCE IC suite).

Module deliveries for 2024/25 academic year

Intended teaching term: Term 1 ÌýÌýÌý Postgraduate (FHEQ Level 7)

Teaching and assessment

Mode of study
In person
Methods of assessment
100% Coursework
Mark scheme
Numeric Marks

Other information

Number of students on module in previous year
0
Module leader
Professor Andreas Demosthenous
Who to contact for more information
eee-ug-admin@ucl.ac.uk

Intended teaching term: Term 1 ÌýÌýÌý Undergraduate (FHEQ Level 7)

Teaching and assessment

Mode of study
In person
Methods of assessment
100% Coursework
Mark scheme
Numeric Marks

Other information

Number of students on module in previous year
15
Module leader
Professor Andreas Demosthenous
Who to contact for more information
eee-ug-admin@ucl.ac.uk

Last updated

This module description was last updated on 8th April 2024.

Ìý